A Discrete Fourier-Cosine Transform Chip

Author

Vetterli, Martin ; Ligtenberg, Adriaan

Author_Institution

Ecole Polytechnique Federale de Lausanne, Lausanne, Switzerland

Volume

4

Issue

1

fYear

1986

fDate

1/1/1986 12:00:00 AM

Firstpage

49

Lastpage

61

Abstract

An 8-point Fourier-cosine transform chip designed for a data rate of 100 Mbits/s is described. The top-down design is presented step by step, including algorithm modification for VLSI suitability, architectural choices, testing overhead, internal precision assignments, mask generation, and finally, verification of the layout. A high-level language (C) design tool was developed concurrently with the layout. This tool allows mimicking exactly the different representations of the algorithm: software, mask, and chip. This provides an automatic cross-checking at all design stages. The VLSI environment created by this tool, as well as existing powerful CAD tools, made a fast design-time possible.

Keywords

DFT; Discrete Fourier transforms (DFT´s); Discrete cosine transform (DCT); VLSI; Very large-scale integration (VLSI); Algorithm design and analysis; Arithmetic; Discrete Fourier transforms; Discrete cosine transforms; Fast Fourier transforms; Fourier transforms; High level languages; Signal processing algorithms; Testing; Very large scale integration;

fLanguage

English

Journal_Title

Selected Areas in Communications, IEEE Journal on

Publisher

ieee

ISSN

0733-8716

Type

jour

DOI

10.1109/JSAC.1986.1146289

Filename

1146289