• DocumentCode
    1059406
  • Title

    Design Examples of System Partitioning and Performance Allocation for VLSI Implementation

  • Author

    Agrawal, Bhagwati P. ; Janakiraman, Natesa

  • Author_Institution
    M/A-COM DCC, Germantown, MD, USA
  • Volume
    4
  • Issue
    1
  • fYear
    1986
  • fDate
    1/1/1986 12:00:00 AM
  • Firstpage
    4
  • Lastpage
    14
  • Abstract
    Generally, in the telecommunication industry, VLSI implementation is viewed as a means to cost reduction and is attempted only after successively decomposing a system into circuits corresponding to individual printed circuit boards (PCB\´s). This traditional "circuit-design" approach is unable to cope with and to exploit the potential of VLSI capabilities such as chip density and processing power. The availability of unprecedented processing power and the recognition of "effective endproduct cost" as the true measure for VLSI chip fabrication are leading the change over from integrated circuit design to integrated system design. In this paper, this emerging system design methodology for VLSI implementation and its two elements, system partitioning and performance specification allocation, are illustrated by two design examples; one relating to line-circuit design and the other to a packet-switch design.
  • Keywords
    Communication systems; VLSI; Very large-scale integration (VLSI); Chip scale packaging; Circuits; Communication industry; Costs; Design methodology; Manufacturing; Packet switching; Silicon; Switches; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Selected Areas in Communications, IEEE Journal on
  • Publisher
    ieee
  • ISSN
    0733-8716
  • Type

    jour

  • DOI
    10.1109/JSAC.1986.1146293
  • Filename
    1146293