• DocumentCode
    1059853
  • Title

    Single Reference Frame Multiple Current Macroblocks Scheme for Multiple Reference Frame Motion Estimation in H.264/AVC

  • Author

    Chen, Tung-Chien ; Tsai, Chuan-Yung ; Huang, Yu-Wen ; Chen, Liang-Gee

  • Author_Institution
    Graduate Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei
  • Volume
    17
  • Issue
    2
  • fYear
    2007
  • Firstpage
    242
  • Lastpage
    247
  • Abstract
    Due to the multiple reference frame motion estimation (MRF-ME), an H.264/AVC encoder requires ultrahigh memory bandwidth. Conventional multiple reference frames single current macroblock (MRSC) scheme only considers the data reuse within one frame, and requires on-chip memory size and off-chip memory bandwidth in proportional to the reference frame number. In this paper, a single reference frame multiple current macroblocks (SRMC) scheme is presented to further exploit the data reuse at frame level. With frame-level rescheduling of the motion estimation ME procedures in different reference frames, one loaded search window can be utilized by multiple current MBs in different original frames. The demanded on-chip memory size and off-chip memory bandwidth for MRF-ME can thus be reduced to those supporting only one reference frame. Moreover, based on SRMC scheme, an architecture prototype with two-stage mode decision flow is proposed. For HDTV specifications, 62.21 KB (74.8%) of SRAM and 364.3 MB/s (62.6%) of system bandwidth are saved in comparison with the MRSC scheme
  • Keywords
    motion estimation; scheduling; video coding; H.264/AVC; HDTV; frame-level rescheduling; multiple reference frame motion estimation; multiple reference frames single current macroblock; single reference frame multiple current macroblocks scheme; two-stage mode decision flow; ultrahigh memory bandwidth; Automatic voltage control; Bandwidth; Computer architecture; HDTV; Hardware; IEC standards; Motion estimation; Prototypes; Random access memory; Very large scale integration; ISO/IEC 14496-10 AVC; ITU-T Rec. H.264; JVT; VLSI architecture; motion estimation; multiple reference frame;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems for Video Technology, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1051-8215
  • Type

    jour

  • DOI
    10.1109/TCSVT.2006.887130
  • Filename
    4079651