Title :
C-MOS/SIS—Using selective SF6etching of {1102} sapphire
Author :
Weitzel, Charles E.
Author_Institution :
RCA Corporation, Princeton, NJ
fDate :
8/1/1978 12:00:00 AM
Abstract :
A process for selectively etching holes in {1102} sapphire using SF6in H2is described. SiO2, Si3N4, and combinations thereof are studied as possible etchant masks. Refilling the holes with epitaxial silicon produces an SIS (silicon-in-sapphire) wafer wherein the silicon islands are imbedded into the sapphire substrate. The electrical characteristics of C-MOS/SIS transistors are similar to those of conventionally processed SOS devices.
Keywords :
Cleaning; Energy consumption; Etching; Integrated circuit noise; Isolation technology; Milling machines; Oxidation; Silicon; Substrates; Sulfur hexafluoride;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/T-ED.1978.19195
