DocumentCode :
1060881
Title :
SOS Device radiation effects and hardening
Author :
Buchanan, Bobbyl ; Neamen, Donald A. ; Shedd, Walter M.
Author_Institution :
Rome Air Development Center (RADC), Hanscom, MA
Volume :
25
Issue :
8
fYear :
1978
fDate :
8/1/1978 12:00:00 AM
Firstpage :
959
Lastpage :
970
Abstract :
The status of radiation-hardening problems common to both C-MOS/SOS and C-MOS/Bulk and the role that the silicon-on-sapphire technology plays as a "dielectric isolation hardening process" fis briefly presented, The new radiation effects problems that are a result of implementing C-MOS technology in SOS instead of in bulk silicon are delineated and put into perspective The main emphasis is on back-channel leakage currents and the novel problerns such as hysterisis effects associated with n-channel "kink" effects, Experimental techniques utilized in identifying the unique C-MOS/SOS radiation effects problems and processing techniques utilized in solving these problems are summarized.
Keywords :
CMOS technology; Circuits; Insulation; Ionizing radiation; MOS devices; MOSFETs; Protection; Radiation effects; Radiation hardening; Threshold voltage;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/T-ED.1978.19208
Filename :
1479602
Link To Document :
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