• DocumentCode
    1062615
  • Title

    Double-level metallurgy defect study

  • Author

    Gregoritsch, A.J., Jr.

  • Author_Institution
    IBM General Technology Division, Essex Junction, VT
  • Volume
    26
  • Issue
    1
  • fYear
    1979
  • fDate
    1/1/1979 12:00:00 AM
  • Firstpage
    34
  • Lastpage
    37
  • Abstract
    A double-level metallurgy (DLM) test chip having purposely induced nonrandom quartz insulation defects (cracks and holes) is used to study the behavior of the defects under accelerated temperature-voltage stress conditions. Data obtained from this stress are analyzed and used to calculate activation energies for an Arrhenius-voltage dependent model.
  • Keywords
    Acceleration; Insulation testing; Integrated circuit technology; Life estimation; Sputter etching; Stress; Surface cracks; Temperature dependence; Vehicles; Voltage;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/T-ED.1979.19375
  • Filename
    1479953
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1062615