DocumentCode
1062632
Title
An Advanced DSP Systolic-Array Architecture
Author
Leeland, Steven B.
Author_Institution
Motorola, Inc., Government Electronics Group
Volume
20
Issue
7
fYear
1987
fDate
7/1/1987 12:00:00 AM
Firstpage
95
Lastpage
95
Keywords
Algorithm design and analysis; Clocks; Computer architecture; Demodulation; Digital signal processing; Government; Logic design; Process design; Signal processing; Very large scale integration;
fLanguage
English
Journal_Title
Computer
Publisher
ieee
ISSN
0018-9162
Type
jour
DOI
10.1109/MC.1987.1663627
Filename
1663627
Link To Document