Title :
Application of a Genetic Algorithm to the Design Optimization of a Multilayer Probe Card for Wafer-Level Testing
Author :
Liu, De-Shin ; Shih, Meng-Kae ; Chang, Chi-Ming
Author_Institution :
Dept. of Mech. Eng., Nat. Chung Cheng Univ., Chiayi
Abstract :
The number of input and output pads on high-performance IC devices has increased in recent years, and hence wafer-level testing is conventionally performed using a probe card with a multilayer needle layout. This paper employs ANSYS commercial software and a Genetic Algorithm (GA) to optimize the design parameters of a multilayer needle probe card such that the scrub marks produced by the different needle layers are of approximately equal length. A dummy probe card containing both a conventional multilayer needle layout and the optimized needle layout is then fabricated and used in a series of single-contact probing tests. The results reveal that the scrub marks produced by the optimized needle layout are both shorter and of a more uniform length that those produced by the conventional needle design. For both needle layouts, a lower and more stable contact resistance is obtained as the overdrive distance is increased. Finally, a multicontact probing test is performed to evaluate the effect on the contact resistance of probe tip contamination following repeated surface contacts. The results show that the needles in the optimized layout are less heavily contaminated than those in the conventional layout, and hence the contact resistance is both lower and more stable. As a consequence, the probe card requires cleaning less frequently and hence its service life is improved.
Keywords :
finite element analysis; genetic algorithms; integrated circuit design; integrated circuit testing; multilayers; needles; probes; ANSYS; contact resistance; design optimization; genetic algorithm; high-performance IC devices; multicontact probing test; multilayer needle layout; multilayer probe card; needle design; probe tip contamination; three-dimensional finite element model; wafer-level testing; Algorithm design and analysis; Contact resistance; Design optimization; Genetic algorithms; Integrated circuit layout; Integrated circuit testing; Needles; Nonhomogeneous media; Performance evaluation; Probes; Finite-element method (FEM); genetic algorithm (GA); multilayer needle card; wafer-level probing test;
Journal_Title :
Electronics Packaging Manufacturing, IEEE Transactions on
DOI :
10.1109/TEPM.2008.2010776