Title :
A circuit concept for reducing soft error in high-speed memory cells
Author :
Tang, Denny D. ; Chuang, Ching-Te
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
Abstract :
For bipolar static memory cells, the essence of the circuit concept is that the potential at the common-emitter node of the cross-coupled transistors (flip-flop) should be allowed to swing freely. This can be implemented by decoupling the common-emitter node from the heavily capacitively loaded lower-word line, e.g. by inserting a current source or a current mirror between the two. The predicted improvements of Q/sub CRIT/, soft-error rate, and the experimental results are presented.<>
Keywords :
bipolar integrated circuits; constant current sources; integrated memory circuits; common-emitter node; cross-coupled transistors; current mirror; current source; decoupling; flip-flop; heavily capacitively loaded lower-word line; high-speed memory cells; soft error; Bipolar integrated circuits; Capacitance; Cities and towns; Flip-flops; Logic circuits; Mirrors; Random access memory; Read-write memory; Resistors; Transistors;
Journal_Title :
Solid-State Circuits, IEEE Journal of
