DocumentCode :
1064090
Title :
FCAT—A low-voltage high-speed alterable n-channel nonvolatile memory device
Author :
Horiuchi, Masatada ; Katto, Hisao
Author_Institution :
Hitachi Ltd., Tokyo, Japan
Volume :
26
Issue :
6
fYear :
1979
fDate :
6/1/1979 12:00:00 AM
Firstpage :
914
Lastpage :
918
Abstract :
The structure and principles of a new nonvolatile charge storage device are described. The Floating Si-gate Channel Corner Avalanche Transition (FCAT) memory device is an n-channel MOS transistor with a floating gate. The p+regions are placed outside the channel area by aligning them with the floating gate and are adjacent to the diffused n+source and/or drain regions. This device can operate in the write/erase modes under low-voltage (12 V) and high-speed (< 1 ms) conditions using only a pair of positive pulses. This is achieved with a novel avalanche transition at the channel corner through a relatively thin (4-6 nm thick) oxide under the open-drain condition.
Keywords :
Boron; Charge carrier processes; Doping; Indium tin oxide; Insulation; Nonvolatile memory; Read-write memory; Transconductance; Tunneling; Voltage;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/T-ED.1979.19518
Filename :
1480096
Link To Document :
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