DocumentCode :
1064912
Title :
A 32/24 bit digital audio signal processor
Author :
Matsushita, Yoshinori ; Jibiki, Tadashi ; Takahashi, Hiroshi ; Takamizawa, Takashi
Author_Institution :
Texas Instrum. Japan Ltd., Tokyo, Japan
Volume :
35
Issue :
4
fYear :
1989
fDate :
11/1/1989 12:00:00 AM
Firstpage :
785
Lastpage :
792
Abstract :
A digital signal processor of novel architecture developed for high-performance audio applications and realizing a new level of parallelism and dynamic range is presented. The chip, featuring 32-b×24-b multiplier/accumulator and 80-ns cycle time, is fabricated using 1.2-μm CMOS double-level metal technology. The performance of audio signal processing is efficiently increased by parallel operation of (calculations and data transfers) and by the configuration of the arithmetic logic unit and the MAC (multiplier and accumulator). The MAC gives sufficient dynamic range for high-precision audio signal processing. Two 24×256 words of data RAMs enable users to execute over 500 taps of FIR (finite impulse response) filtering with one processor. The cascade configuration of the processors enables users to execute very long taps of FIR filtering
Keywords :
CMOS integrated circuits; audio equipment; digital filters; digital signal processing chips; random-access storage; 1.2 micron; 32/24 bit digital audio signal processor; CMOS double-level metal technology; arithmetic logic unit; cascade-form FIR filtering; data RAM; dynamic range; finite impulse response; high-performance audio applications; multiplier/accumulator; Counting circuits; Digital signal processing; Digital signal processors; Dynamic range; Instruments; Random access memory; Read-write memory; Signal design; Signal processing; Signal sampling;
fLanguage :
English
Journal_Title :
Consumer Electronics, IEEE Transactions on
Publisher :
ieee
ISSN :
0098-3063
Type :
jour
DOI :
10.1109/30.106896
Filename :
106896
Link To Document :
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