Development of an Ultralow-Power Injection-Locked PSK Receiver Architecture

The development of a novel receiver topology for ultralow-power applications, such as radio-frequency (RF) identification and wireless sensor networks, is presented in this brief. The receiver makes use of an injection-locked oscillator, which can also be used as an exact time reference. By applying phase steps to the injected RF signal, the injection-locked oscillator temporarily loses its lock condition. This can be detected by a simple digital phase detector. By modulating the time between these phase steps, a bit stream is encoded and the circuit is used as a low-data-rate receiver. Since the circuit overhead, as compared to the injection-locked time reference itself, only consists of a few digital gates, the architecture is suitable for use in ultralow-power applications. Starting from Adler´s equation for injection-locked oscillators, the behavior of the receiver is theoretically explained and the maximum data bandwidth is determined. This is compared to simulation results and measured data of a 40-nm CMOS implementation.