DocumentCode :
106527
Title :
Low-Complexity Tree Architecture for Finding the First Two Minima
Author :
Youngjoo Lee ; Bongjin Kim ; Jaehwan Jung ; In-Cheol Park
Author_Institution :
Interuniv. Microelectron. Center (IMEC), Leuven, Belgium
Volume :
62
Issue :
1
fYear :
2015
fDate :
Jan. 2015
Firstpage :
61
Lastpage :
64
Abstract :
This brief presents an area-efficient tree architecture for finding the first two minima as well as the index of the first minimum, which is essential in the design of a low-density parity-check decoder based on the min-sum algorithm. The proposed architecture reduces the number of comparators by reusing the intermediate comparison results computed for the first minimum in order to collect the candidates of the second minimum. As a result, the proposed tree architecture improves the area-time complexity remarkably.
Keywords :
circuit complexity; decoding; parity check codes; trees (mathematics); area-efficient tree architecture; area-time complexity; comparators; low-complexity tree architecture; low-density parity-check decoder; min-sum algorithm; Complexity theory; Computer architecture; Decoding; Delays; Hardware; Multiplexing; Parity check codes; Area-efficient design; Digital integrated circuits; LDPC codes; Minimum value generation; Tree structure; digital integrated circuits; low-density parity-check (LDPC) codes; minimum value generation; tree structure;
fLanguage :
English
Journal_Title :
Circuits and Systems II: Express Briefs, IEEE Transactions on
Publisher :
ieee
ISSN :
1549-7747
Type :
jour
DOI :
10.1109/TCSII.2014.2362663
Filename :
6922514
Link To Document :
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