DocumentCode
1065357
Title
Parity generator circuit using a multistate resonant tunnelling bipolar transistor
Author
Sen, Satyaki ; Capasso, Federico ; Cho, Andrew Y. ; Sivco, D.L.
Author_Institution
AT&T Bell Labs., Murray Hill, NJ
Volume
24
Issue
24
fYear
1988
fDate
11/24/1988 12:00:00 AM
Firstpage
1506
Lastpage
1507
Abstract
A four-bit parity generator circuit using a single resonant tunnelling bipolar transistor (RTBT) exhibiting two negative transconductance regions in the characteristics, is demonstrated. The circuit uses only one transistor as compared to 24 needed in conventional logic. The present circuit also provides significant advantages over previous parity generator circuits using resonant tunnelling diodes. The same circuit, when used with only two input bits, will act as an exclusive-NOR gate
Keywords
bipolar transistors; hot electron transistors; integrated logic circuits; logic design; logic gates; HET; RTBT; XNOR gate; exclusive-NOR gate; four-bit parity generator circuit; multistate resonant tunnelling bipolar transistor; parity generator circuits; single resonant tunnelling bipolar transistor; two negative transconductance regions;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
Filename
27932
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