DocumentCode
1067325
Title
Discrete-time cellular neural networks using distributed arithmetic
Author
Soo-Ik Chae
Volume
31
Issue
21
fYear
1995
fDate
10/12/1995 12:00:00 AM
Firstpage
1851
Lastpage
1852
Abstract
An efficient digital architecture for the discrete-time cellular neural networks (DTCNNs) is proposed that employs the distributed arithmetic (DA). It consumes little silicon area because of the bit serial computation of DA, and offers higher speed operation than the analogue implementations of DTCNN. The proposed architecture has been implemented in a 0.8 μm CMOS technology
Keywords
CMOS digital integrated circuits; cellular neural nets; digital arithmetic; neural chips; 0.8 micron; CMOS technology; DTCNNs; bit serial computation; digital architecture; discrete-time cellular neural networks; distributed arithmetic;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
Filename
475037
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