Title :
Time series modeling of photosensitive polymer development rate for via formation applications
Author :
Kim, Tae Seon ; May, Gary S.
Author_Institution :
Sch. of Comput. Sci. & Electron. Eng., Catholic Univ. of Korea, Kyunggi-Do, South Korea
fDate :
7/1/2002 12:00:00 AM
Abstract :
Via formation is a critical process in multichip module (MCM) manufacturing, as it greatly impacts yield, density, and reliability. For via formation using photosensitive polymers such as benzocyclobutene (BCB), development is an extremely important step, and insuring adequate time for the completion of polymer dissolution is the key to defining the desired via pattern. To simultaneously optimize via yield and process throughput, the proper development time needs to be identified. However, it is difficult to determine the development endpoint because it is very sensitive to several process and material conditions. In this paper, a neural network-based time series modeling scheme is developed and applied to determine the optimal endpoint for photosensitive BCB development. The Lithacon 808 Process Analyzer, which is typical of this type of system, is used to demonstrate the approach. To characterize the development step, exposure dose energy and time series data consisting of previous film thickness measurements are used to model expected film thicknesses at future times. Model prediction results are compared with experimental results, and it is shown that the neural time series model can effectively characterize the effects of changes in exposure dose energy on development endpoint.
Keywords :
electronic engineering computing; modelling; multichip modules; neural nets; photolithography; polymer films; time series; Lithacon 808 Process Analyzer; MCM manufacturing; benzocyclobutene; development endpoint; exposure dose energy; film thickness measurements; multichip module manufacturing; neural network-based time series modeling scheme; photosensitive polymer development rate; polymer dissolution; time series data; via formation; Costs; Integrated circuit packaging; Lithography; Manufacturing processes; Multichip modules; Neural networks; Polymers; Predictive models; Semiconductor device modeling; Thin film circuits;
Journal_Title :
Electronics Packaging Manufacturing, IEEE Transactions on
DOI :
10.1109/TEPM.2002.806302