DocumentCode
1068091
Title
Hypercube multiprocessors with bus connections for improving communication performance
Author
Ishikawa, Tsutomu
Author_Institution
NTT Commun. Sci. Lab., Kanagawa, Japan
Volume
44
Issue
11
fYear
1995
fDate
11/1/1995 12:00:00 AM
Firstpage
1338
Lastpage
1344
Abstract
A modified hypercube with multiple buses used as bypass routes is proposed. This is achieved by partitioning all processor elements into subsets using coding theory and by connecting all PEs in each subset to a bus. The basic structure for small systems reduces the diameter to two (one on a bus plus one on a link). In the generalized structure for large systems, it is reduced to less than about one-third that of the regular hypercube
Keywords
Hamming codes; hypercube networks; network routing; parallel architectures; performance evaluation; Hamming code; bus connections; bypass routes; coding theory; communication performance; hypercube multiprocessors; multiple buses; network diameter; perfect code; routing algorithms; Circuits; Codes; Computer architecture; Hamming distance; Hardware; Hypercubes; Joining processes; Network topology; Routing; System performance;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/12.475131
Filename
475131
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