• DocumentCode
    10684
  • Title

    Recomputing with Permuted Operands: A Concurrent Error Detection Approach

  • Author

    Xiaofei Guo ; Karri, Ramesh

  • Author_Institution
    Dept. of Electr. & Comput. Eng., New York Univ., Brooklyn, NY, USA
  • Volume
    32
  • Issue
    10
  • fYear
    2013
  • fDate
    Oct. 2013
  • Firstpage
    1595
  • Lastpage
    1608
  • Abstract
    Naturally occurring and maliciously injected faults reduce the reliability of cryptographic hardware and may leak confidential information. We develop a concurrent error detection technique (CED) called recomputing with permuted operands (REPO). We show that it is cost effective in advanced encryption standard (AES) and a secure hash function Grøstl. We provide experimental results and formal proofs to show that REPO detects all single-bit and single-byte faults. Experimental results show that REPO achieves close to 100% fault coverage for multiple byte faults. The hardware and throughput overheads are compared with those of previously reported CED techniques on two Xilinx Virtex FPGAs. The hardware overhead is 12.4%-27.3%, and the throughput is 1.2-23 Gbps, depending on the AES architecture, FPGA family, and detection latency. The performance overhead ranges from 10% to 100% depending on the security level. Moreover, the proposed technique can be integrated into various block cipher modes of operation. We also discuss the limitation of REPO and its potential vulnerabilities.
  • Keywords
    cryptography; error detection; fault diagnosis; field programmable gate arrays; AES; CED; Grøstl; REPO; Xilinx Virtex FPGA; advanced encryption standard; block cipher; concurrent error detection technique; cryptographic hardware; hash function; injected faults; multiple byte faults; recomputing with permuted operands; Ciphers; Circuit faults; Encryption; Hardware; Redundancy; Concurrent error detection; differential fault analysis; recomputing with permuted operands;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.2013.2263037
  • Filename
    6600917