DocumentCode :
1068405
Title :
A well-synchronized sensing/equalizing method for sub-1.0-V operating advanced DRAMs
Author :
Ooishi, Tsukasa ; Asakura, Mikio ; Tomishima, Shigeki ; Hidaka, Hideto ; Arimoto, Kazutami ; Fujishima, Kazuyasu
Author_Institution :
ULSI Lab., Mitsubishi Electr. Corp., Hyogo, Japan
Volume :
29
Issue :
4
fYear :
1994
fDate :
4/1/1994 12:00:00 AM
Firstpage :
432
Lastpage :
440
Abstract :
Proposes an advanced DRAM array driving technique which can achieve low-voltage operation, a well-synchronized sensing and equalizing method. This method sets the DRAM array free from the body effect, achieves a small influence of the short channel effect, and reduces the leakage current. The sense and restore amplifier and equalizer can operate rapidly under a low-voltage operating condition such as 1.0 V VCC. Therefore, one can make determining the V th easy for the satisfaction of the high-speed, the low-power dissipation, and a simple device structure. The well-synchronized sensing and equalizing method is applicable to low-voltage operating DRAMs with capacity of 256 Mbits and more
Keywords :
CMOS integrated circuits; DRAM chips; driver circuits; equalisers; 1.0 V; 256 Mbit; CMOS technology; DRAMs; array driving technique; leakage current; low-voltage operation; sense and restore amplifier; sensing/equalizing method; short channel effect; storage capacity; Circuits; Equalizers; Leakage current; Low voltage; MOSFETs; Operational amplifiers; Power dissipation; Power system reliability; Random access memory; Threshold voltage;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.280692
Filename :
280692
Link To Document :
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