DocumentCode
1069441
Title
Subnanosecond self-aligned I2L/MTL circuits
Author
Tang, D.D. ; Ning, Tak H. ; Isaac, Randall D. ; Feth, George C. ; Wiedmann, Siegfried K. ; Yu, Hwa-Nien
Author_Institution
IBM Thomas J. Watson Research Center, Yorktown Heights, NY
Volume
27
Issue
8
fYear
1980
fDate
8/1/1980 12:00:00 AM
Firstpage
1379
Lastpage
1384
Abstract
A self-aligned I2L/MTL technology featuring collectors doped from and contacted by polysilicon, self-aligned collector and base contact edges, and metal-interconnected bases is described. Experimental ring-oscillator circuits designed with 2.5-µm design rules and fabricated with this technology exhibit gate delays as small as 0.8 ns at
µA for fan-in = 1 and fan-out = 3. Increased wiring flexibility and improved circuit density are inherent advantages of this self-aligned technology.
µA for fan-in = 1 and fan-out = 3. Increased wiring flexibility and improved circuit density are inherent advantages of this self-aligned technology.Keywords
Delay; Diodes; Helium; Integrated circuit interconnections; Laboratories; Merging; Rails; Shape; Silicon; Wiring;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/T-ED.1980.20043
Filename
1480836
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