DocumentCode
1069465
Title
An advanced PSA technology for high-speed bipolar LSI
Author
Nakashiba, Hiroshi ; Ishida, Ichiro ; Aomura, Kunio ; Nakamura, Toshio
Author_Institution
Nippon Electric Company Ltd., Kawasaki, Japan
Volume
27
Issue
8
fYear
1980
fDate
8/1/1980 12:00:00 AM
Firstpage
1390
Lastpage
1394
Abstract
An advanced method for polysilicon self-aligned (PSA) bipolar LSI technology has realized a miniaturized transistor for high performance. By introducing the overlapping structure for double polysilicon electrodes, the emitter area is reduced to 1 µm × 3 µm and the base junction is reduced to 0.3 µm. The CML integrated circuit composed of this transistor has achieved a minimum propagation delay time of 0.29 ns/gate with power dissipation of 1.48 mW/gate. Compared to the conventional PSA method, this technology promises to fabricate higher speed and higher density LSI´s.
Keywords
Electrodes; Graphics; Integrated circuit interconnections; Integrated circuit technology; Large scale integration; Oxidation; Power dissipation; Propagation delay; Silicon; Transistors;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/T-ED.1980.20045
Filename
1480838
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