DocumentCode
1069578
Title
A general simulator for VLSI lithography and etching processes: Part II—Application to deposition and etching
Author
Oldham, William G. ; Neureuther, Andrew R. ; Sung, Chiakang ; Reynolds, John L. ; Nandgaonkar, Sharad Narayan
Author_Institution
University of California, Berkeley, CA
Volume
27
Issue
8
fYear
1980
fDate
8/1/1980 12:00:00 AM
Firstpage
1455
Lastpage
1459
Abstract
The extension of the general process simulator SAMPLE to plasma etching and metallization is described. The etching algorithm is divided into isotropic, anisotropic, and direct milling components and is suitable for modeling wet etching, plasma etching, reactive ion etching, and ion milling. Separate deposition algorithms are used for CVD, sputtering, and planetary deposition. With the extension, it is possible to use a simple keyword repertoire to simulate a sequence of photolithography, etching, and deposition steps to obtain device cross sections at each stage of fabrication.
Keywords
Anisotropic magnetoresistance; Lithography; Metallization; Milling; Plasma applications; Plasma devices; Plasma simulation; Sputter etching; Very large scale integration; Wet etching;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/T-ED.1980.20056
Filename
1480849
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