DocumentCode
1069772
Title
An Mo gate 4K static MOS RAM
Author
Ishikawa, Hajime ; Yamamoto, Minoru ; Tokunaga, Hiroshi ; Toyokura, Nobuo ; Yanagawa, Fumihiko ; Kiuchi, Kazuhide ; Kondo, Mamoru
Author_Institution
Fujitsu Laboratories Ltd., Kawasaki, Japan
Volume
27
Issue
8
fYear
1980
fDate
8/1/1980 12:00:00 AM
Firstpage
1586
Lastpage
1590
Abstract
Performance of a 4K static MOS RAM was improved significantly with utilization of low-resistance molybdenum-gate process instead of conventional polysilicon-gate process. A typical access time of 27 ns was achieved with a low power consumption of 250 mW when the RAM was operated at supply voltage of 5 V and TTL-compatible I/O levels. Signal propagation delay along the word line of the RAM was quite small as a result of the reduction in interconnection resistance. Several disadvantages of the Mo gate process were overcome by improving fabrication technologies.
Keywords
Annealing; Electrodes; Fabrication; Integrated circuit interconnections; Propagation delay; Random access memory; Read-write memory; Silicon; Temperature; Voltage;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/T-ED.1980.20074
Filename
1480867
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