DocumentCode
1070611
Title
Failure analysis requirements for nanoelectronics
Author
Vallett, David P.
Author_Institution
IBM Microelectron. Div., Essex Junction, VT, USA
Volume
1
Issue
3
fYear
2002
fDate
9/1/2002 12:00:00 AM
Firstpage
117
Lastpage
121
Abstract
Failure analysis (FA) plays a vital role in the development and manufacture of integrated circuits. However, instrumental limits are already threatening FA in the tenth-micron CMOS realm, and nanoelectronic devices will find key analytical tools two orders of magnitude removed in capability. This paper will introduce state-of-the-art microelectronic failure analysis processes, instrumentation, and principles. It will discuss the major limitations and future prospects determined from industry roadmaps. Specifically highlighted is the need for a fault isolation methodology for failure analysis of fully integrated nanoelectronics devices.
Keywords
CMOS integrated circuits; failure analysis; inspection; integrated circuit testing; nanoelectronics; CMOS; failure analysis requirements; fault isolation methodology; industry roadmaps; inspection; instrumentation; microelectronic failure; nanoelectronics; Atomic force microscopy; Circuit faults; Failure analysis; Inspection; Instruments; Magnetic force microscopy; Microelectronics; Nanoelectronics; Scanning electron microscopy; Transmission electron microscopy;
fLanguage
English
Journal_Title
Nanotechnology, IEEE Transactions on
Publisher
ieee
ISSN
1536-125X
Type
jour
DOI
10.1109/TNANO.2002.806826
Filename
1159212
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