A Generalization of a Fast RNS Conversion for a New 4-Modulus Base

Author

Didier, Laurent-Stéphane ; Rivaille, Pierre-Yves

Author_Institution

Lab. d´´Inf. de Paris 6, Univ. Pierre et Marie Curie, Paris

Volume

56

Issue

1

fYear

2009

Firstpage

46

Lastpage

50

Abstract

A generalization of a new generic 4-modulus base for residue number systems (RNS) is presented in this paper. An efficient RNS to binary conversion algorithm and a hierarchical architecture for these bases are also described. The key features of our conversion architecture compared to previous published architectures of the same output range are a larger moduli set selection and savings on the critical delay, area and power. The FPGA implementation and the detailed proof supporting it are also discussed.

Keywords

field programmable gate arrays; logic design; residue number systems; 4-modulus base; binary conversion algorithm; critical delay; field programmable gate arrays; logic design; moduli set selection; residue number systems; Algorithm design and analysis; Arithmetic; Computer applications; Concurrent computing; Cryptography; Delay; Digital signal processing; Field programmable gate arrays; Logic; FPGA design; moduli sets; residue number systems (RNS); residue-to-binary converter;

fLanguage

English

Journal_Title

Circuits and Systems II: Express Briefs, IEEE Transactions on

Publisher

ieee

ISSN

1549-7747

Type

jour

DOI

10.1109/TCSII.2008.2010157

Filename

4753698