DocumentCode :
1072650
Title :
Design Optimization and Performance Projections of Double-Gate FinFETs With Gate–Source/Drain Underlap for SRAM Application
Author :
Kim, Seung-Hwan ; Fossum, Jerry G.
Author_Institution :
Samsung Electron. Co. Ltd., Seoul
Volume :
54
Issue :
8
fYear :
2007
Firstpage :
1934
Lastpage :
1942
Abstract :
Physical device/circuit simulations are used to explore 6T-SRAM cell design and scaling using double-gate (DG) FinFETs with optimized gate-source/drain (G-S/D) underlap. The underlap is designed for the control of threshold voltage (Vt) in the nanoscale FinFET with undoped ultrathin body (UTB). DG FinFETs with underlap are first characterized in terms of for various S/D-extension lengths (Lext), lateral doping-density straggles (sigmaL), and fin-UTB thicknesses (wSi). The relation between and read-static noise margin (SNM) is established to define an optimal SRAM cell, for the Semiconductor Industry Association´s International Technology Roadmap for Semiconductors (ITRS) HP45 node with Lg=18 nm, with large SNM as well as large write-0 margin and good immunity to process-induced variations of Lext, sigmaL, wSi, and Lg. Then, a scalability study of the DG FinFET-based SRAM cell is done, showing a continual significant benefit of the optimally designed doable underlaps to the end of the ITRS. In addition to the SRAM application, the novel idea of FinFET Vt control via underlap design is stressed, and its application to high-performance CMOS is discussed.
Keywords :
CMOS integrated circuits; MOSFET; SRAM chips; voltage control; CMOS; International Technology Roadmap for Semiconductors; SRAM cells; double-gate FinFET; gate-source-drain underlap; read-static noise margin; threshold voltage control; ultrathin body; Circuit simulation; Design optimization; Electronics industry; FinFETs; Immune system; Random access memory; Scalability; Semiconductor device noise; Threshold voltage; Voltage control; CMOS scalability; double-gate (DG) MOSFETs; sensitivity to process variations; threshold voltage control;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2007.901070
Filename :
4277965
Link To Document :
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