• DocumentCode
    1073154
  • Title

    Modeling the impurity profile in an ion-implanted layer of an IGFET for the calculation of threshold voltages

  • Author

    Dang, Luong Mo ; Iwai, Hiroshi

  • Author_Institution
    Toshiba Corporation, Saiwai-ku, Kawasaki-shi, Japan
  • Volume
    28
  • Issue
    1
  • fYear
    1981
  • fDate
    1/1/1981 12:00:00 AM
  • Firstpage
    116
  • Lastpage
    117
  • Abstract
    An extremely simple model for the impurity profile in an ion-implanted channel layer of an IGFET is applied to simulating the substrate bias dependence of its threshold voltage. Excellent agreement is obtained between theory and experiment on n-channel silicon devices.
  • Keywords
    Conductivity; Conductors; Dielectric substrates; Fabrication; Impurities; Laboratories; Niobium; Shape; Silicon devices; Threshold voltage;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/T-ED.1981.20291
  • Filename
    1481443
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1073154