DocumentCode
1073475
Title
Design Trade-Offs in VAX-11 Translation Buffer Organization
Author
Satyanarayanan, M. ; Bhandarkar, Dileep
Author_Institution
Carnegie-Mellon University
Volume
14
Issue
12
fYear
1981
Firstpage
103
Lastpage
111
Abstract
A major feature of the VAX-11 is its large virtual address space. This trace-driven simulation scheme evaluates address translation hardware that supports this feature cost-effectively.
Keywords
Control systems; Data structures; Hardware; Memory architecture; Memory management; Microcomputers; Operating systems; Registers; Switches; Virtual private networks;
fLanguage
English
Journal_Title
Computer
Publisher
ieee
ISSN
0018-9162
Type
jour
DOI
10.1109/C-M.1981.220301
Filename
1667208
Link To Document