DocumentCode
1073562
Title
Bulk traps in silicon-on-sapphire by conductance DLTS
Author
Chen, Jun-Wei ; Ko, Robert J. ; Brzezinski, Dennis W. ; Forbes, Leonard ; Dell´oca, Conrad J.
Author_Institution
Hewlett-Packard/CICO, Cupertino, CA
Volume
28
Issue
3
fYear
1981
fDate
3/1/1981 12:00:00 AM
Firstpage
299
Lastpage
304
Abstract
A new deep-level transient spectroscopy (DLTS) technique has been developed for the characterization of deep-level imperfection centers in silicon-on-sapphire (SOS) epitaxial layers, and is based on the use of conductance transients on MOSFET´s. Both the distribution of trap levels with energy in the bandgap of silicon and the spatial distribution of levels in the epitaxial film have been obtained. This complete characterization of trapping levels allows process techniques to be developed to control and reduce their concentrations to acceptable levels in SOS technology.
Keywords
Capacitance; Crystallization; Epitaxial layers; Fabrication; MOSFETs; Optical films; Semiconductor films; Spectroscopy; Substrates; Testing;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/T-ED.1981.20332
Filename
1481484
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