Title :
Gate-Level Redundancy: A New Design-for-Reliability Paradigm for Nanotechnologies
Author :
Namazi, Ali ; Nourani, Mehrdad
Author_Institution :
Dept. of Electr. Eng., Univ. of Texas at Dallas, Richardson, TX, USA
fDate :
5/1/2010 12:00:00 AM
Abstract :
Redundancy-based techniques have been widely used to correct the faulty behavior of components and achieve high reliability. N-tuple modular redundancy (NMR) systems, in particular, are all based on majority voting. The voter unit therefore becomes a bottleneck for the correct operation of any NMR system. In this paper, we propose a novel current-based voting strategy to design a robust NMR system. We show that, with this inexpensive strategy, we can completely eliminate the centralized voter unit and push NMR to the logic gate level. Our strategy achieves high reliability that is vital for future nanotechnology in which a high defect rate is expected. At the same time, it consumes less power and has less propagation delay compared to conventional NMR systems. Experimental results are reported to verify the concept, clarify the design procedure, and measure the system´s reliability.
Keywords :
integrated circuit design; integrated circuit reliability; logic design; nanotechnology; redundancy; N-tuple modular redundancy systems; NMR system; centralized voter unit; current-based voting strategy; design-for-reliability paradigm; faulty behavior; future nanotechnology; gate-level redundancy; logic gate level; majority voting; nanotechnologies; propagation delay; redundancy-based techniques; system reliability; $N$-tuple Modular Redundant (NMR); Current-based driver; defect tolerance; distributed voting; nanotechnology; redundancy; reliability;
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
DOI :
10.1109/TVLSI.2009.2016206