DocumentCode :
1074546
Title :
Design and Implementation of a Field Programmable CRC Circuit Architecture
Author :
Toal, Ciaran ; McLaughlin, Kieran ; Sezer, Sakir ; Yang, Xin
Author_Institution :
ECIT-Queen´´s Univ. Belfast, Belfast, UK
Volume :
17
Issue :
8
fYear :
2009
Firstpage :
1142
Lastpage :
1147
Abstract :
The design and implementation of a programmable cyclic redundancy check (CRC) computation circuit architecture, suitable for deployment in network related system-on-chips (SoCs) is presented. The architecture has been designed to be field reprogrammable so that it is fully flexible in terms of the polynomial deployed and the input port width. The circuit includes an embedded configuration controller that has a low reconfiguration time and hardware cost. The circuit has been synthesised and mapped to 130-nm UMC standard cell [application-specific integrated circuit (ASIC)] technology and is capable of supporting line speeds of 5 Gb/s.
Keywords :
VLSI; cyclic redundancy check codes; error detection codes; integrated circuit design; system-on-chip; application-specific integrated circuit; cyclic redundancy check; embedded configuration controller; error detection; field programmable CRC circuit architecture; network processing; system-on-chip; Cyclic redundancy check (CRC); error detection; field programmable; network processing; reconfigurable;
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/TVLSI.2008.2008741
Filename :
5075525
Link To Document :
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