• DocumentCode
    1076446
  • Title

    Dry etching technology for 1-µm VLSI fabrication

  • Author

    Hirata, Kazuo ; Ozaki, Yoshiharu ; Oda, Masatoshi ; Kimizuka, Masakatsu

  • Author_Institution
    Nippon Telegraph and Telephone Public Corporation, Tokyo, Japan
  • Volume
    28
  • Issue
    11
  • fYear
    1981
  • fDate
    11/1/1981 12:00:00 AM
  • Firstpage
    1323
  • Lastpage
    1331
  • Abstract
    A dry etching technology for 1-µm VLSI has been developed. This technology led to successful fabrication of a 1-µm 256-kbit MOS RAM using electon-beam direct writing and molybdenum-polysilicon double-gate structure. Silicon nitride, silicon dioxide, phosphosilicate glass, polysilicon, single-crystal silicon, molybdenum, and aluminum are etched by parallel-plate RF diode reactors. Resist patterns are used as etching masks. The negative resist is CMS and the positive resist is FPM. Plasma polymerization is found to have significant effect on etching selectivity, undercutting, and residue. Directional etching profiles are realized and 1-µm patterns with less than 0.05-µm undercutting are obtained. High etching selectivities are achieved. Methods for preventing and removing contamination as well as damage are established. With these, dry etching proves to bring no adverse effects on device characteristics. Pattern-width fluctuations caused by negative-resist pattern foot are decreased to below 0.1 µm by a new foot trimming technique. Resist step coverage is also clarified.
  • Keywords
    Aluminum; Dry etching; Fabrication; Foot; Glass; Radio frequency; Resists; Silicon compounds; Very large scale integration; Writing;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/T-ED.1981.20609
  • Filename
    1481761