DocumentCode :
1076971
Title :
Adjustment-Based Modeling for Timing Analysis Under Variability
Author :
Xie, Lin ; Davoodi, Azadeh ; Zhang, Jun ; Wu, Tai-Hsuan
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Wisconsin, Madison, WI
Volume :
28
Issue :
7
fYear :
2009
fDate :
7/1/2009 12:00:00 AM
Firstpage :
1085
Lastpage :
1095
Abstract :
This paper presents an adjustment-based modeling framework for timing analysis under variability. Instead of building a complex model (such as polynomial one) directly between the circuit timing and parameter variability, we propose to build a model that adjusts an approximate variation-aware timing into an accurate one. The idea is that it is easier to build a model that adjusts an approximate estimate into an accurate one. In addition, it is more efficient to obtain an approximate circuit timing model. The combination of these two observations makes the use of an adjustment-based model a better choice for statistical static timing analysis with high dimension of parameter variability (e.g., at sign-off stage). It can also be used at the postsilicon stage to predict the circuit timing from a smaller subcircuit. To build the adjustment model, we use a simulation-driven approach based on Gaussian Process. Combined with the intelligent sampling, we show that an adjustment-based model can more effectively capture the nonlinearity of the circuit timing with respect to parameter variability compared to polynomial models. Simulation results show that with 42 independent device and interconnect parameter variations, our proposed adjustment-based model obtained using 200 circuit timing samples can achieve much higher accuracy than quadratic model obtained using 2000 samples.
Keywords :
Gaussian processes; circuit analysis computing; statistical analysis; timing; Gaussian process; adjustment-based modeling; circuit timing model; parameter variability; statistical static timing analysis; timing analysis; Adjustment-based model; Gaussian Process (GP); Latin Hypercube Design (LHD); postsilicon timing prediction; statistical static timing analysis (SSTA);
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/TCAD.2009.2018874
Filename :
5075805
Link To Document :
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