DocumentCode
1076999
Title
Thin layer high-voltage junction FET (resurf JFET)
Author
Appels, J.A. ; Vaes, H.M.J. ; Ruis, W.N.J.
Author_Institution
Philips Research Laboratories, Eindhoven, Netherlands
Volume
2
Issue
2
fYear
1981
fDate
2/1/1981 12:00:00 AM
Firstpage
38
Lastpage
40
Abstract
The application of Resurf layers [1] especially in relation to high-voltage silicon JFETs is described. Because the breakdown voltage in Resurf devices is in principle determined by the high-ohmic substrate, the possibility is opened to make high-voltage JFETs in very thin, relative highly doped top layers. By making use of a profiled instead of a constant impurity doping concentration in these layers, the drain saturation current can be enlarged considerably while the same channel thickness is maintained.
Keywords
Breakdown voltage; Conductivity; Diodes; Doping profiles; FETs; Helium; Impurities; MOS devices; Silicon; Substrates;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/EDL.1981.25332
Filename
1481816
Link To Document