Title :
Border-Trap Characterization in High-κ Strained-Si MOSFETs
Author :
Maji, Debabrata ; Duttagupta, S.P. ; Rao, V. Ramgopal ; Yeo, Chia Ching ; Cho, Byung-Jin
Author_Institution :
Indian Inst. of Technol., Bombay
Abstract :
In this letter, we focus on the border-trap characterization of TaN/HfO2/Si and TaN/HfO2/strained-Si/Si0.8Ge0.2 n-channel MOSFET devices. The equivalent oxide thickness for the gate dielectrics is 2 nm. Drain-current hysteresis method is used to characterize the border traps, and it is found that border traps are higher in the case of high-kappa films on strained- Si/Si0.8Ge0.2 .These results are also verified by the 1/f-noise measurements. Possible reasons for the degraded interface quality of high-kappa films on strained-Si are also proposed.
Keywords :
MOSFET; dielectric hysteresis; hafnium compounds; high-k dielectric thin films; interface states; tantalum compounds; MOSFET devices; TaN-HfO2-Si; border-trap characterization; degraded interface quality; drain-current hysteresis method; equivalent oxide thickness; gate dielectrics; CMOS technology; Charge pumps; Dielectrics; Fabrication; Frequency; Hafnium oxide; Hysteresis; MOSFETs; Pulse measurements; Rapid thermal annealing; 1/f noise; Border traps; charge pumping; hysteresis; interface trapping; strained-Si;
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2007.902086
