DocumentCode
1077699
Title
Parallel implementation of the fast Fourier transform on two TMS320C25 digital signal processors
Author
Hen-Geul Yeh
Author_Institution
Dept. of Electr. Eng., California State Univ., Long Beach, CA
Volume
41
Issue
1
fYear
1994
fDate
2/1/1994 12:00:00 AM
Firstpage
132
Lastpage
135
Abstract
The author used two fixed-point TMS320C25 digital signal processors (DSPs) to implement in parallel the FFT. The significance of this multiprocessing system is: (1) the number of times block data transfer occurs between these two DSPs is minimum, (2) each DSP can independently perform the same FFT routine with different data set, and (3) the total computational load is nearly equally distributed to two DSPs. The speedup of this system over a single sequential processor is close to two
Keywords
digital signal processing chips; fast Fourier transforms; parallel processing; DSP; FFT; TMS320C25 digital signal processors; block data transfer; fast Fourier transform; multiprocessing system; parallel implementation; Computer displays; Concurrent computing; Digital signal processing; Digital signal processors; Distributed computing; Fast Fourier transforms; Hardware; Multiprocessing systems; Parallel processing; Signal processing algorithms;
fLanguage
English
Journal_Title
Industrial Electronics, IEEE Transactions on
Publisher
ieee
ISSN
0278-0046
Type
jour
DOI
10.1109/41.281620
Filename
281620
Link To Document