DocumentCode
1078112
Title
A virtual self-aligned process for n-channel InP IGFET´s (or MISFET´s)
Author
Tseng, W.F. ; Bark, M.L. ; Dietrich, H.B. ; Christou, A. ; Henry, R.L. ; Schmidt, W.A. ; Saks, N.S.
Author_Institution
Naval Research Laboratory, Washington, D.C.
Volume
2
Issue
11
fYear
1981
fDate
11/1/1981 12:00:00 AM
Firstpage
299
Lastpage
301
Abstract
A virtual self-aligned process for fabricating IGFET´s (or MISFET´s) has been developed. Devices fabricated on semiinsulating InP substrates using this process show: (i) square-law characteristics, (ii) an inverse-relationship between transconductance and gate length, and (iii) high surface channel electron mobilities on the order of 1000 cm2/v.sec.
Keywords
Annealing; Electron mobility; Etching; Gold; Indium phosphide; Insulation; Ion implantation; Microwave devices; Resists; Transconductance;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/EDL.1981.25441
Filename
1481925
Link To Document