Title :
Inverted Staggered Poly-Si Thin-Film Transistor With Planarized SOG Gate Insulator
Author :
Cheon, Jun Hyuk ; Bae, Jung Ho ; Jang, Jin
Author_Institution :
Kyung Hee Univ., Seoul
fDate :
3/1/2008 12:00:00 AM
Abstract :
In this letter, we have studied the inverted staggered thin-film transistor (TFT) using a spin-on-glass (SOG) gate insulator and a low-temperature polycrystalline silicon (poly-Si) by Ni-mediated crystallization of amorphous silicon. The p-channel poly-Si TFT exhibited a field-effect mobility of 48.2 cm2/V ldr s, a threshold voltage of -4.2 V, a gate-voltage swing of 1.2 V/dec, and a minimum off-current of < 4 times 10-13A/ mum at Vds = -0.1 V. Therefore, the gate planarization technology by SOG can be applicable to low-cost large-area poly-Si active-matrix displays.
Keywords :
amorphous semiconductors; crystallisation; insulated gate field effect transistors; silicon; thin film transistors; Si; TFT; amorphous silicon; field-effect mobility; gate planarization technology; inverted staggered poly-silicon thin-film transistor; low-temperature polycrystalline silicon; nickel-mediated crystallization; planarized SOG gate insulator; spin-on-glass gate insulator; voltage -4.2 V; voltage 0.1 V; Active matrix technology; Costs; Crystallization; Dielectrics; Glass; Insulation; Planarization; Silicon; Thin film transistors; Threshold voltage; Inverted staggered (IS); Spin-on-Glass (SOG); low-temperature polycrystalline silicon (poly-Si) (LTPS); metal-induced crystallization using a cap layer (MICC); planarization; thin-film transistor (TFT);
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2008.915623
