DocumentCode :
1078501
Title :
Fluxless Flip-Chip Solder Joint Fabrication Using Electroplated Sn-Rich Sn–Au Structures
Author :
Kim, Jongsung ; Kim, Dongwook ; Lee, Chin C.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Univ. of California, Irvine, CA
Volume :
29
Issue :
3
fYear :
2006
Firstpage :
473
Lastpage :
482
Abstract :
A fluxless flip-chip bonding process in hydrogen environment using newly developed Sn-rich Sn-Au electroplated multilayer solder bumps is presented. Cr/Au dual layer is employed as the plating seed layer and the underbump metallurgy (UBM). This UBM design, seldom used in the electronic industry, is explained in some details. To realize the fluxless possibility, proper intermetallic growth over the composite structure is needed. In this connection, we like to point out that it is much harder to achieve fluxless bonding using Sn-rich Sn-Au design than the familiar Au-rich 80Au20Sn eutectic design. This is so because Sn-rich Sn-Au alloys have numerous Sn atoms on the surface that can get oxidized easily while the Au-Sn eutectic alloy at thermal equilibrium consists of only Au5Sn and AuSn compounds. Intermetallic nucleation and growth mechanism of sequential electroplating of Au over thick Sn layer is studied with scanning electron microscope (SEM), energy dispersive X-ray spectroscopy (EDX), and X-ray diffraction method (XRD). It is found that Au-Sn intermetallic forms as Au is plated over the Sn layer and acts as a barrier that prevents the oxidation of the inner Sn layer, making fluxless possibility a reality. It is found that the SnAu intermetallic compounds are randomly distributed in the Sn rich joint making the joint strong. The resulting joints contain few voids as examined by an SEM and a scanning acoustic microscope (SAM) and have a remelting temperature of 217degC-222degC. The plated Sn-Au solder bumps on silicon with 50 mum in height are flip-chip bonded to borosilicate glass substrate. This new fluxless flip-chip bonding process is valuable in many applications where the use of flux is prohibited
Keywords :
electroplating; flip-chip devices; metallisation; soldering; 217 to 222 C; 50 micron; Cr-Au; Sn-Au; X-ray diffraction method; X-ray spectroscopy; borosilicate glass; flip-chip bonding process; fluxless flip-chip bonding; fluxless flip-chip solder joint; intermetallic compound; intermetallic nucleation; multilayer solder bumps; plating seed layer; scanning electron microscope; sequential electroplating; tin electroplating; underbump metallurgy; Bonding processes; Chromium; Fabrication; Flip chip solder joints; Gold alloys; Hydrogen; Intermetallic; Nonhomogeneous media; Scanning electron microscopy; Tin; Au; AuSn; Cr; Sn; electroplating; fluxless flip-chip bonding;
fLanguage :
English
Journal_Title :
Advanced Packaging, IEEE Transactions on
Publisher :
ieee
ISSN :
1521-3323
Type :
jour
DOI :
10.1109/TADVP.2006.875414
Filename :
1667866
Link To Document :
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