Predicting harmonic distortion in switched-current memory circuits

The switched-current (SI) technique has recently been proposed as a cheaper alternative to the switched-capacitor (SC) technique. This stems largely from the fact that the analog signal processing functions performed by a SC circuit using linear capacitors and MOS transistors can be replaced by a SI circuit consisting solely of MOS transistors. At this time, most of the SI circuit design techniques and analysis have dealt strictly with the linear behavior of SI circuits. But, since SI circuits use only MOS transistors to perform linear processing, it seems apparent to ask the question: how linear are SI circuits? This paper identifies a major source of distortion in SI memory circuits and derives an explicit formula that bounds the total harmonic distortion (THD) that results from this source of distortion. Also, the frequency range over which this type of distortion dominates will be discussed. Both simulation and experimental results verify the proposed theory