Title :
Silicon-based packaging platform for light-emitting diode
Author :
Tsou, Chingfu ; Huang, Yu-Sheng
Author_Institution :
Dept. of Autom. Control Eng., Feng Chia Univ., Taichung
Abstract :
A novel concept of silicon-based packaging platform with microreflector and embedded electrode-guided interconnections was development for a package component of a light-emitting diode (LED). TracePro and ANSYS software were respectively used to understand the optical and thermal characteristics of the package component. Simulation results show the microreflector at several certain specific dimensions can be used to achieve high brightness, and the carrier made of silicon wafer compared with that of aluminum stage can minimize the thermal stresses caused by mismatch of thermal expansion coefficient. The novel packaging platform was fabricated by silicon bulk micromachining and solder reflow techniques. Various solutions in fabricating embedded solder interconnections were explored to accomplish the electrode-guided interconnections. Experimental results show the method using solder paste reflow can achieve better yield and performance. The electrical resistances of such solder interconnections with the height of 100 mum were measured to be less than 5 Omega. As such, this technique can be applied broadly in packaging for conventional optoelectronic semiconductor devices such as laser diodes and image sensors
Keywords :
electronics packaging; interconnections; light emitting diodes; micromachining; reflow soldering; silicon; ANSYS software; TracePro; bulk micromachining; embedded electrode-guided interconnections; light-emitting diode; microreflectors; silicon substrate; silicon-based packaging platform; solder interconnections; solder reflow techniques; thermal expansion coefficient; thermal stress; Brightness; Light emitting diodes; Optical devices; Optical interconnections; Optical sensors; Packaging; Silicon; Software packages; Thermal expansion; Thermal stresses; Bulk micromachining; light-emitting diode (LED) package; silicon substrate; thermal stress;
Journal_Title :
Advanced Packaging, IEEE Transactions on
DOI :
10.1109/TADVP.2006.875409