Title :
Systematic design strategy for concurrent error diagnosable iterative logic arrays
Author :
Chan, S.-W. ; Leung, S.S. ; Wey, C.-L.
Author_Institution :
Dept. of Electr. Eng. & Syst. Sci., Michigan State Univ., East Lansing, MI, USA
fDate :
3/1/1988 12:00:00 AM
Abstract :
An in-depth study of RESO (re-computing with shifted operands) theory is conducted which leads to the extension of the theory so that efficient CED designs for two-dimensional array structures and complex functions can be achieved. Based on the enhanced version of RESO, a systematic design strategy has been developed to allow the designer to take advantage of knowledge of fault configurations.
Keywords :
VLSI; cellular arrays; fault location; logic design; RESO; VLSI; complex functions; concurrent error diagnosable iterative logic arrays; shifted operands; systematic design strategy; two-dimensional array structures;
Journal_Title :
Computers and Digital Techniques, IEE Proceedings E
