DocumentCode :
1079311
Title :
Properties of interconnection on silicon, sapphire, and semi-insulating gallium arsenide substrates
Author :
Yuan, Han-tzong ; Lin, Yung-Tao ; Chiang, Shang-yi
Author_Institution :
Texas Instruments Incorporated, Dallas, TX
Volume :
29
Issue :
4
fYear :
1982
fDate :
4/1/1982 12:00:00 AM
Firstpage :
639
Lastpage :
644
Abstract :
Interconnection capacitances and inductances on oxide-passivated silicon, sapphire, and semi-insulating gallium arsenide substrates were calculated and compared. The results showed that, including coupling effects, the capacitances on insulating substrates are lower only at large linewidths, but become comparable to values on silicon substrates at linewidths below 2.5 µm. The frequency-dependent nature of inductances on silicon substrates was reviewed. The results indicated that, at frequencies where most digital integrated circuits operate, silicon substrates can be treated as a lossless medium. Hence, inductances on silicon substrates can be calculated by the same means as on insulating substrates. The propagation delay of an interconnection resulting from using different substrates was also evaluated. It can be shown that for VLSI development the choice of substrates is not nearly as critical as the problem of series resistance of an interconnection.
Keywords :
Capacitance; Coupling circuits; Digital integrated circuits; Frequency; Gallium arsenide; Insulation; Integrated circuit interconnections; Propagation delay; Silicon; Very large scale integration;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/T-ED.1982.20756
Filename :
1482253
Link To Document :
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