• DocumentCode
    1080147
  • Title

    Weighted sum codes for error detection and their comparison with existing codes

  • Author

    McAuley, A.J.

  • Author_Institution
    Bellcore, Morristown, NJ, USA
  • Volume
    2
  • Issue
    1
  • fYear
    1994
  • fDate
    2/1/1994 12:00:00 AM
  • Firstpage
    16
  • Lastpage
    22
  • Abstract
    Describes a new family of error detection codes called weighted sum codes. These codes are preferred over four existing codes (CRC, Fletcher checksum, Internet checksum, and XTP CXOR), because they combine powerful error detection properties (as good as the CRC) with attractive implementation properties. One variant, WSC-1, has efficient software and hardware implementations; while a second variant, WSC-2, is almost as efficient in software (still significantly better than CRC) and offers commutative processing (that enables efficient out-of-order, parallel, and incremental update processing)
  • Keywords
    error detection codes; protocols; telecommunications computing; WSC-1; WSC-2; commutative processing; error detection codes; implementation properties; software; weighted sum codes; Computer errors; Cyclic redundancy check; Error correction; Hardware; Internet; Out of order; Polynomials; Protection; Shift registers; Transport protocols;
  • fLanguage
    English
  • Journal_Title
    Networking, IEEE/ACM Transactions on
  • Publisher
    ieee
  • ISSN
    1063-6692
  • Type

    jour

  • DOI
    10.1109/90.282604
  • Filename
    282604