Analysis of nonlinearities in MOS floating resistor networks

Expressions for the linearised V/I characteristics of a group of floating resistor structures employing MOS transistors operating in the triode mode are presented. Mobility-degradation effects are accurately modelled and identified as the major residual distortion source in most configurations. The application of common-mode signals to the gate and substrate terminals of a single device is shown to produce a benchmark linearisation performance. Geometrical mismatches are identified as having a potentially dominant influence on the extent to which second-harmonic distortion is suppressed