DocumentCode :
1080622
Title :
Low input capacitance and low loss VD-MOSFET rectifier element
Author :
Shimada, Yuuki ; Kato, Kuniharu ; Ikeda, Shigeru ; Yoshida, Hiroshi
Author_Institution :
Nippon Telegraph and Telephone Public Corporation, Tokyo, Japan
Volume :
29
Issue :
8
fYear :
1982
fDate :
8/1/1982 12:00:00 AM
Firstpage :
1332
Lastpage :
1334
Abstract :
A Vertical DSA-MOSFET (VD-MOSFET) has been designed and fabricated, whose gate pattern is selectively removed. This VD-MOSFET has an Ron of 13 mΩ ( 
V), a Ciss of 4300 pF ( 
V), a blocking voltage of 40 V, and a 232-cm channel width on a 6.5 mm × 6.5 mm chip. Calculated static loss ratio is about 4 percent for 5-V, 15-A output use. Considering the fact that the loss ratio of a Schottky diode is about 8 percent, this new ratio represents a 50-percent improvement.
V), a C V), a blocking voltage of 40 V, and a 232-cm channel width on a 6.5 mm × 6.5 mm chip. Calculated static loss ratio is about 4 percent for 5-V, 15-A output use. Considering the fact that the loss ratio of a Schottky diode is about 8 percent, this new ratio represents a 50-percent improvement.Keywords :
Capacitance; Computational Intelligence Society; Electrons; MOSFET circuits; Rectifiers; Regulators; Schottky diodes; Solid state circuits; Telegraphy; Voltage;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/T-ED.1982.20877
Filename :
1482374
Link To Document :
