DocumentCode
1081233
Title
Maintaining I/O Data Coherence in Embedded Multicore Systems
Author
Berg, Thomas B.
Author_Institution
MIPS Technol., Beaverton, OR
Volume
29
Issue
3
fYear
2009
Firstpage
10
Lastpage
19
Abstract
In embedded systems, multiple cores mean multiple caches and often multiple cache levels. Consequently, maintaining coherency between the cores´ caches and the data generated or consumed by I/O devices is challenging, with different solutions trading off hardware versus software complexity. The optimal approach for I/O data coherence depends on application and system characteristics, and might require a combination of techniques.
Keywords
cache storage; embedded systems; microprocessor chips; I/O data coherence; embedded multicore systems; hardware complexity; software complexity; Coherence; Control systems; Embedded computing; Embedded software; Embedded system; Hardware; Multicore processing; Software maintenance; TV; US Department of Transportation; I/O coherence; cache; coherence manager; embedded systems; hardware/software interfaces; memory hierarchy; multicore;
fLanguage
English
Journal_Title
Micro, IEEE
Publisher
ieee
ISSN
0272-1732
Type
jour
DOI
10.1109/MM.2009.44
Filename
5076435
Link To Document