Title :
Logic Mapping in Crossbar-Based Nanoarchitectures
Author :
Rao, Wenjing ; Orailoglu, Alex ; Karri, Ramesh
Author_Institution :
Univ. of Illinois, Chicago, IL
Abstract :
This article presents a mathematical model and algorithm that address the problem of logic function mapping in a nanoelectronic environment. Enhancement techniques improve the algorithm´s runtime by significantly cutting down on unnecessary backtracking processes.
Keywords :
CMOS integrated circuits; logic circuits; mathematical analysis; nanoelectronics; crossbar-based nanoarchitectures; logic function mapping; mathematical model; nanoelectronic environment; CMOS logic circuits; Diodes; Fabrication; Logic functions; Nanoscale devices; Nanostructures; Nanowires; Programmable logic arrays; Self-assembly; Wires; bipartite graph; crossbar; defect tolerance; logic function mapping; logic synthesis; nanoelectronic system; nanofabric; reliability; two-level logic;
Journal_Title :
Design & Test of Computers, IEEE
DOI :
10.1109/MDT.2009.14
