• DocumentCode
    1082000
  • Title

    Logic Mapping in Crossbar-Based Nanoarchitectures

  • Author

    Rao, Wenjing ; Orailoglu, Alex ; Karri, Ramesh

  • Author_Institution
    Univ. of Illinois, Chicago, IL
  • Volume
    26
  • Issue
    1
  • fYear
    2009
  • Firstpage
    68
  • Lastpage
    77
  • Abstract
    This article presents a mathematical model and algorithm that address the problem of logic function mapping in a nanoelectronic environment. Enhancement techniques improve the algorithm´s runtime by significantly cutting down on unnecessary backtracking processes.
  • Keywords
    CMOS integrated circuits; logic circuits; mathematical analysis; nanoelectronics; crossbar-based nanoarchitectures; logic function mapping; mathematical model; nanoelectronic environment; CMOS logic circuits; Diodes; Fabrication; Logic functions; Nanoscale devices; Nanostructures; Nanowires; Programmable logic arrays; Self-assembly; Wires; bipartite graph; crossbar; defect tolerance; logic function mapping; logic synthesis; nanoelectronic system; nanofabric; reliability; two-level logic;
  • fLanguage
    English
  • Journal_Title
    Design & Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/MDT.2009.14
  • Filename
    4760118
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1082000