System Decomposition, Partitioning, and Integration for Microelectronics

The process of determining what should be in an electronic package or on an LSI slice is considered a partitioning problem with a set of constraints. An approach to system decomposition and partitioning is established from the viewpoint of minimizing external signal lines by minimizing the number of pins per set of packages, which will improve reliability and performance and reduce cost. Applications of combinatorial analysis and signal graph theory to partition a group of circuits are illustrated. System partitioning levels are identified as complexity levels. A partitioning procedure is given for use at any complexity level, and equations are provided for counting the possible number of partitions. A combinatorial technique is developed to count the number of pins per package. System integration is considered here to be the process of converting interconnections of circuits and elements to intraconnections of function blocks. An integration factor concept, based on the number of signal lines and required pins per package, is introduced. The integration factor is used to ascertain tradeoffs and compromises of possible partitions and integration techniques. The rules given provide an analytic method for solving some of the problems of system design.