DocumentCode :
1082201
Title :
A vertically isolated self-aligned transistor—VIST
Author :
Takemoto, Toyoki ; Fujita, Tsutomu ; Kawakita, Kenji ; Sakai, Hiroyuki
Author_Institution :
Matsushita Electric Industrial Company, Ltd., Osaka, Japan
Volume :
29
Issue :
11
fYear :
1982
fDate :
11/1/1982 12:00:00 AM
Firstpage :
1761
Lastpage :
1765
Abstract :
A vertically isolated self-aligned transistor (VIST) has been developed to make possible high-speed low-power dissipation bipolar devices suitable for LSI. This VIST consists of a bird´s beak free oxide isolated structure and a high impurity density inactive base self-aligned to the polysilicon emitter. A flat emitter transistor with a self-aligned base is developed by forming an inactive high impurity density base region with an ion-implantation method using a polysilicon emitter as a mask. The transistors exhibit uniform current gain even to current levels as low as 10-8A. The ftvalue of this transistor is 6 GHz. The ring oscillators and counter are fabricated using the 13 × 6 µm2transistor cell. The power and delay product is 0.12 pJ.
Keywords :
Bipolar transistors; Degradation; Electrodes; Etching; Fabrication; Impurities; Integrated circuit technology; Ion implantation; Silicon; Very large scale integration;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/T-ED.1982.21023
Filename :
1482520
Link To Document :
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